1. Field of the Invention
The present invention relates to the field of thermal management of semiconductor devices. More particularly, this invention relates to a circuit and method for reducing an internal clocking frequency of the semiconductor device upon receiving a first signal indicating fan failure and/or a second signal indicating thermal overload.
2. Background of the Invention
It is common knowledge that most semiconductor devices, as shown in FIG. 1, comprise an integrated circuit as a die 2 encapsulated within a cavity 3 of a package 4 such as a Pin Grid Array ("PGA") package. This package 4 is usually made of ceramic and performs numerous functions including but not limited to protecting the integrated circuit from damage, dissipating heat from the integrated circuit during operation, and providing electrical communications between the semiconductor device and other semiconductor devices. To establish electrical communication with other semiconductor devices employed within a system, a plurality of wire leads 5 are coupled to the die 2 and correspondingly coupled to a plurality of connector pins 6. These plurality of connector pins 6 make electrical and mechanical contact with a plurality of bus lines within a printed circuit board 7 (e.g., a peripheral card, motherboard, etc.) generally incorporated within a computer system.
During operation, the die 2 consumes power at a rate correlated to its internal clocking frequency and generates heat as a by-product. Generally, heat is dissipated from the heat conductive die 2 adhesively attached to the package 4. Thereafter, the package 4 dissipates the heat to its surrounding atmosphere 8. For low-power semiconductor devices, the package 4 alone is typically sufficient to dissipate the heat.
Many semiconductor devices, especially microprocessors, operate at an internal clock frequency substantially greater than a system bus clock frequency of a computer system in order to allow the semiconductor device 1 to perform at its fastest possible frequency while allowing data exchange between the semiconductor device 1 and the printed circuit board 7 to proceed at the lesser system bus clock frequency. A dynamic feedback loop, including but not limited to a phase locked-loop ("PLL"), enables multiple derivatives of the system bus clock. Although a higher internal clock frequency enables better chip performance, it also increases thermal dissipation requirements so that the package 4 alone is usually incapable of providing adequate thermal dissipation, requiring at least a conventional thermal transfer device such as a heatsink 9a with optionally a heat slug 9b to be coupled into a bottom portion 4a of the package 4 proximate to the die 2 as shown in FIG. 2.
Following this line of reasoning, some current generation and most next generation semiconductor devices will consume more power than any prior semiconductor devices such that the heatsink 9a and/or heat slug 9b may not provide adequate thermal dissipation. Thus, an additional thermal transfer device (e.g., a fan) 10 is usually coupled to the heatsink 9a to provide a high level of airflow as shown in FIG. 3. However, reliance on the operation of the fan for cooling the semiconductor device offers many disadvantages.
One primary disadvantage is that the reliability of the semiconductor device is now also based on the reliability of the fan due to the fact that if the fan becomes inoperative (i.e., fan failure), so does the semiconductor device. This poses a problem especially when the fan is inherently less reliable than the semiconductor device, thereby lessening the reliability of the semiconductor device.
Another disadvantage is that using the fan without any monitoring mechanism exposes the semiconductor device to potential damage from excessive die temperature ("thermal overload"). Such thermal overload is likely if the fan element becomes inoperable or its performance falls below a certain level.
Hence, it would be desirable to provide a circuit and method for modifying the operation speed of the semiconductor device, which is directly related to power consumption, upon detection of a fan failure and/or thermal overload conditions. Although such modification of this operation speed would cause a temporary loss in performance of the semiconductor device, it would prevent total loss of functionality if the semiconductor device becomes damaged.